Sign outOpen workspaceSign in

SlotLayer 0

Compile a circuit to a specific device

Turn a circuit written as arbitrary unitaries over abstract qubits into an executable instruction sequence for one machine's own gate set and connectivity graph. The result is functionally equivalent, or equivalent to within a stated approximation error.

Takes

An abstract circuit (arbitrary-angle rotations, arbitrary two-qubit gates, all-to-all qubit indices); a device model giving the native gate set, coupling graph and calibration data; an approximation budget ε\varepsilon.

Returns

A native-gate instruction sequence obeying the connectivity constraint, plus the overhead it added (SWAP count, T-count, depth) and the accumulated synthesis error.

This one, drawn

Compile a circuit to a specific deviceNISQ transpilation (retargetable pass pipeline) · 2 parts insideNISQ transpilation (retargetable pass pipeline) · 2 parts inside — click the line to open it hereFault-tolerant compilation (Clifford+T pipeline) · 2 parts insideFault-tolerant compilation (Clifford+T pipeline) · 2 parts inside — click the line to open it hereNISQ transpilation (retargetable pass pipeline) · 2 parts inside — click the name to read about itNISQ transpilationFault-tolerant compilation (Clifford+T pipeline) · 2 parts inside — click the name to read about itFault-tolerant compilationAbstract circuit — you start hereDevice circuit — you finish here

Drag to pan. Pinch, or hold ctrl and scroll, to zoom. Arrow keys pan, plus and minus zoom, zero resets the view.

From Abstract circuit to Device circuit

A circle is an object you are holding. Each line between the two ends is one recorded way through this slot; where a way is built from smaller slots, those are its own lines. Circles are named on hover, and each one is a link.

2 lines here have ways through that this figure does not open. The map opens them in place. See it on the map

Why this is a layer

The same algorithm compiles to very different instruction sequences on different machines, and nothing above this boundary changes. The layer is also entered at different depths — a pre-fault-tolerant backend consumes arbitrary-angle rotations directly, a surface-code backend consumes only a discrete gate set — which is why a gate count quoted by an algorithms paper does not carry across it.

Ways to do this

2 methods recorded

  • NISQ transpilation (retargetable pass pipeline)

    A pass pipeline that decomposes to the device's own two-qubit gate, routes onto the coupling graph, and optimizes for two-qubit gate count and depth. Arbitrary-angle single-qubit rotations are emitted directly, because the hardware executes them.

  • Fault-tolerant compilation (Clifford+T pipeline)

    Decompose to Clifford+T, approximate every continuous rotation by a discrete gate word, optimize for T-count and T-depth, then express the result as a schedule of logical operations on encoded patches — typically Pauli-product measurements under lattice surgery.

Routes that skip this layer

No recorded route avoids this step.

This is a step inside

Nothing in this graph needs this as a step, so it is where a reading starts.

In the Atlas