SlotLayer 1
Satisfy the hardware connectivity constraint
Place logical qubits on physical ones and schedule connectivity-repair operations — usually SWAPs — so that every two-qubit gate acts on a coupled pair. The problem combines subgraph isomorphism with token swapping.
The circuit's two-qubit interaction graph or DAG; the device coupling graph; optionally per-edge error rates and gate durations.
An initial logical-to-physical mapping and a routed circuit, costed in added SWAP count and added depth.
This one, drawn
From Abstract circuit to Routed circuit
A circle is an object you are holding. Each line between the two ends is one recorded way through this slot; where a way is built from smaller slots, those are its own lines. Circles are named on hover, and each one is a link.
Nothing drawn here has a recorded way through it that this figure leaves shut. See it on the map
Why this is a layer
It is a self-contained combinatorial problem with a full ladder of fillings, from fast heuristics to exact solvers, and it disappears on hardware with all-to-all or reconfigurable connectivity. That disappearance is what makes it a layer rather than an implementation detail: the same algorithm pays a routing tax on a superconducting grid and none on a machine that physically moves its qubits.
Ways to do this
3 methods recorded
- SABRE (SWAP-based bidirectional heuristic search)
Insert SWAPs guided by a lookahead cost function, and obtain a good initial mapping by traversing the circuit forward and then in reverse, so the final mapping of one pass seeds the other. A decay term trades added depth against added gate count.
- LightSABRE a narrower version of SABRE (SWAP-based bidirectional heuristic search)
A re-engineered SABRE — the Qiskit production implementation, largely rewritten in Rust — whose algorithmic changes improve both runtime and routing quality on large circuits. The release-valve mechanism it carries was already present in the Qiskit 0.20.1 baseline it is measured against.
- Exact layout synthesis by mathematical programming
Encode placement and routing jointly as a mathematical program over a spacetime variable encoding and solve it exactly. Relaxing the same formulation yields a fast near-optimal synthesizer.
Routes that skip this layer
No recorded route avoids this step.
This is a step inside
- NISQ transpilation (retargetable pass pipeline)
A pass pipeline that decomposes to the device's own two-qubit gate, routes onto the coupling graph, and optimizes for two-qubit gate count and depth. Arbitrary-angle single-qubit rotations are emitted directly, because the hardware executes them.
In the Atlas
No record in the Atlas covers this yet. The catalogue is circuits and primitives; this part of the literature is not in it.