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SlotLayer 1

Approximate a continuous rotation in a discrete gate set

Given a target single-qubit unitary — typically a z-rotation by an arbitrary angle — and a precision ε\varepsilon, produce a finite word over a fixed discrete gate set such as Clifford+T whose product is within ε\varepsilon of the target in a stated metric. The cost is charged in non-Clifford gates.

Takes

A target unitary or channel; a precision ε\varepsilon; a metric (operator norm or diamond norm); the gate set; and whether ancillas, measurement or mixing are permitted.

Returns

A gate word, costed in T-count (or non-Clifford count).

This one, drawn

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From Abstract circuit to Discrete-gate circuit

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Why this is a layer

A fault-tolerant architecture can only apply a discrete gate set, so every continuous rotation in every algorithm above has to pass through here, and the price is paid in the dominant cost unit of the fault-tolerant stack. The competing fillings differ not by constants but by the exponent on log(1/ε)\log(1/\varepsilon). Pre-fault-tolerant hardware skips the layer entirely by executing arbitrary angles natively — and TT-counts stated over different gate sets or different metrics are different quantities that must not be placed on one axis.

Ways to do this

2 methods recorded

  • Solovay-Kitaev algorithm

    Recursively refine an approximation using group commutators, for any finite inverse-closed set that densely generates the group. It is the general-purpose fallback: it works on gate sets with no exploitable algebraic structure.

  • Number-theoretic Clifford+T synthesis of z-rotations (Ross-Selinger)

    Reduce approximation of a z-rotation to a grid problem over the ring Z[1/sqrt(2),i]Z[1/sqrt(2), i] plus a relative norm equation, then exactly synthesize the resulting ring element. This is the production method for z-rotations under Clifford+T.

Routes that skip this layer

These do not fill the slot. They replace the span it belongs to, so this layer is not on their path at all.

  • NISQ transpilation (retargetable pass pipeline)

    A pass pipeline that decomposes to the device's own two-qubit gate, routes onto the coupling graph, and optimizes for two-qubit gate count and depth. Arbitrary-angle single-qubit rotations are emitted directly, because the hardware executes them.

This is a step inside

  • Fault-tolerant compilation (Clifford+T pipeline)

    Decompose to Clifford+T, approximate every continuous rotation by a discrete gate word, optimize for T-count and T-depth, then express the result as a schedule of logical operations on encoded patches — typically Pauli-product measurements under lattice surgery.

In the Atlas

No record in the Atlas covers this yet. The catalogue is circuits and primitives; this part of the literature is not in it.